Salaires pour le poste Design Verification Engineer, Leuven, VLG

Technical team lead for the digital content of mixed-signal ASICs including interaction with customers, suppliers and the internal ASIC development team.

Collaborate within and outside your agile team in an international environment. Have a lot of freedom and collaborate with a diverse set of nice colleagues.

You have a master’s degree in electrical engineering (preferably chip design). You have strong communication and reporting skills, also in English.

You have a master degree in Electrical Engineering. Interact with the CAD team to improve the flow. Assist design engineers in real-number modeling tasks.

Must be able to provide a university internship contract (no internships after graduation). The models will be used to simulate and predict implant deformation.

You will be working in an international team, playing a significant role in exploring and designing DSP algorithms and Digital Designs, using state-of-the-art…