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Digital Design Engineer - FPGA Developer

INTERSOFT ELECTRONICS N.V.
Anvers

Soumettre votre candidature

Détails de l'emploi

CDI | Temps plein

Qualifications

FPGA
VHDL
Git
Master
Verilog
SystemVerilog
Python

Description complète du poste

Functieniveau

Vaktechnisch - expert

Diploma

Industrieel ingenieur (ing.)

Type vacature

Vaste job

Type contract

Onbepaalde duur

Arbeidsregime

Voltijds

Talenkennis

Nederlands

Engels

Plaats tewerkstelling

Antwerpen

Ervaring

2 jaar

Sector

Elektronica en technologische industrie

Ingenieurs- en studiebureaus (excl. bouw)

Telecom, ICT en internet

Functieomschrijving

Intersoft Electronics is a Belgian engineering company active in the domain of air traffic control (ATC) and air-defence radar. It is our mission to create and deliver cutting edge solutions in these fields and enable our customers to achieve comprehensive and reliable radar coverage leading to safer airways. Our products and services are used worldwide!

Are you enthusiastic about pushing the boundaries of digital design in a high-tech environment? We are seeking a skilled FPGA developer to join our dynamic team and contribute to the advancement of cutting-edge radar technology.

As a Digital Design Engineer you’ll join our engineering team to develop advanced radar systems and radar test equipment. You are a true team player, collaborating closely with hardware, firmware, and software engineers to deliver integrated and reliable designs.

Your tasks and Responsibilities:
Analyse system and functional requirements and translate them into clear and efficient HDL designs
Design and implement HDL modules and custom IP blocks in HDL (Verilog / SystemVerilog and VHDL)
Develop and integrate AXI-based IPs in the programmable logic (PL) of Zynq MPSoC or other high-end FPGAs, in close collaboration with firmware and software teams for AXI-Lite register and control logic design
Apply FPGA design techniques such as clock domain crossing (CDC), efficient use of hardened FIFO, memory, and DSP blocks, fixed-point arithmetic, static timing analysis, and constraint management
Build testbenches in CocoTb and/or SystemVerilog for functional verification using Siemens Questa Sim
Work with Xilinx Vivado Design Suite, including scripting design flows using TCL and Python, and managing source code with Git
Test and validate your HDL designs on hardware targets using Python
Support the hardware team during board bring-up and I/O validation, including hands-on debugging with measurement equipment.
Document design decisions, interfaces, source code, and test results — as a continuous process throughout the entire development cycle
Not all of these skills are required from day one — but the more you bring, the better. We value curiosity, learning, and growth on the job.

Algemene vereisten

You hold a master’s degree in electronics or an equivalent technical background with at least 3 years of proven experience in FPGA design
You are a true team player, willing to collaborate closely with hardware, firmware, and software engineers to deliver integrated and reliable designs
You are a continuous learner

Aanbod en voordelen

Congestion-free working environment with flexible hours, including the option to work up to 2 days at home depending on the job content.
Engaging team activities with friendly colleagues.
Varied job in a stimulating, high-tech working environment.
Continuous opportunities for personal and professional development.
Permanent position with a market-based salary, supplemented with company benefits including a car.

Sollicitatieprocedure

Please send your CV and a letter of motivation to [email protected].

For more information about this function or selection procedure you can contact us at the same address mentioned above.

Your talent is more important than your gender, orientation, origin, age, or disability.

Soumettre votre candidature

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axis emplois

Digital Design Engineer - FPGA Developer

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Sales, Marketing, Finance of HR

Accountmanager ICT

Support Engineer

Technology Lead

Cybersecurity

SOC Engineer

Service Level Management Associate

System Engineer

IT Engineering

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Junior Business Developer

Cloud Solution Architect | Azure & Modern Workplace

Growth Marketing Stagiair – Talent Acquisition Team

Senior FPGA Engineer (VHDL/Verilog)

Je souhaite recevoir la dernière alerte Emploi pour les postes de ce type : axis

Functieomschrijving

Algemene vereisten

Aanbod en voordelen

Sollicitatieprocedure

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